Areas of Interest:

• Parallel Programming Models
• Performance Modeling and Analysis
• Memory Management and Models(including software caching and prefetching)
• Thread management and Thread-level speculation(including scheduling and load-balancing)
• Cache hierarchy design
• Interconnection and network on chip
• Power-aware design
• Simulation tools
• Compilation techniques
• Homogenous and Heterogeneous architectures
• Security issues

Original research/review papers/articles on any topic in the above areas are invited to be submitted by the prospective participants, together with their consent or otherwise for inclusion in the proceedings being planned to be published subsequently after due refereeing and editorial processes; acceptance of such contributions will be subject to their not having been submitted elsewhere.